Academic Profile

Academic Profile

Assoc Prof Kim Tae Hyoung

Associate Professor, School of Electrical & Electronic Engineering
Deputy Director, Centre for Integrated Circuits and Systems, School of Electrical & Electronic Engineering

Email: thkim@ntu.edu.sg
Assoc Prof Kim Tae Hyoung

Biography
Prof. Tony T. Kim received the B.S. and M.S. degrees in electrical engineering from Korea University, Seoul, Korea, in 1999 and 2001, respectively. He received the Ph.D. degree in electrical and computer engineering from University of Minnesota, Minneapolis, MN, USA in 2009. From 2001 to 2005, he worked for Samsung Electronics where he performed research on the design of high-speed SRAM memories, clock generators, and IO interface circuits. In 2007 ~ 2009 summer, he was with IBM T. J. Watson Research Center and Broadcom Corporation where he performed research on isolated NBTI/PBTI measurement circuits and SRAM Mismatch measurement test structure, and battery backed memory design, respectively. In November 2009, he joined Nanyang Technological University where he is currently an associate professor. His current research interests include low power and high performance digital, mixed-mode, and memory circuit design, ultra-low voltage sub-threshold circuit design for energy efficiency, variation and aging tolerant circuits and systems, approximate computing, and circuit techniques for 3D ICs.

He received Best Demo Award at 2016 IEEE APCCAS, International Low Power Design Contest award at 2016 IEEE/ACM ISLPED, a best paper award at 2014 and 2011 ISOCC, 2008 AMD/CICC Student Scholarship Award, 2008 Departmental Research Fellowship from U. of Minnesota, 2008 IEEE DAC/ISSCC Student Design Contest Award, 2008 Samsung Humantec Thesis Award (Bronze Prize), 2005 ETRI Journal Paper of the Year Award, 2001 Samsung Humantec Thesis Award (Honor Prize), and 1999 Samsung Humantec Thesis Award (Silver Prize). He is an author/co-author of around 120 journal and conference papers and holds 17 US and Korean patents. He serves as an Associate Editor of IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Access, and IEIE Journal of Semiconductor Technology and Science (JSTS). He has also served as a technical committee member of various conferences such as IEEE Asian Solid-State Circuits Conference (A-SSCC), IEEE International Symposium on Circuits and Systems (ISCAS), IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), etc. He was the Chair of IEEE SSCS Singapore Chapter in 2015~2016. He is a senior member of IEEE.
Research Interests
Low power and high performance digital, mixed-mode, and memory circuit design, ultra-low voltage sub-threshold circuit design for energy efficient systems, variation and aging tolerant circuits and systems, and circuit techniques for 3D ICs.
Current Projects
  • Advanced ReRAM Technology for Embedded Systems
  • Energy-Efficient and Endurable Memory Interface Circuits (WP 1 and WP3)
  • Triboelectric Nanogenerator Energy Harvesting System Design for IoT applications
Selected Publications
  • Weng-Geng Ho, Kwen-Siong Chong, Tony Tae-Hyoung Kim, Bah-Hwee Gwee. (2019). A Secure Data-Toggling SRAM for Confidential Data Protection. IEEE Transactions on Circuits and Systems. Part 1: Regular Papers, 66(11), 4186-4199.
  • J. E. Kim, T. Yoo, K.-H. Beak, and T. T.-H. Kim. (2019). A balanced sampling switch for high linearity and a wide temperature range in low power SAR ADCs. Electronics Letters, 55(24), 1273-1275.
  • Dang Van Thai, Bo-Yun Jung, Kwang-Hyun Baek, Taegeun Yoo, and Tony Tae-Hyoung Kim. (2018, November). A 12-bit 200-MS/s Pipelined ADC using Maximization of Settling Time Scheme. Paper presented at 15th Internation SoC Design Conference.
  • Sultan M. Siddiqui, Ruchi Sharma, Van Loi Le, Taegeun Yoo, Ik-Joon Chang, and Tony TaeHyoung Kim. (2018, November). A Radiation Hardened SRAM with Self-refresh and Compact Error Correction. Paper presented at 15th Internation SoC Design Conference.
  • Ngoc-Son Pham, Taegeun Yoo, Tony Tae-Hyoung Kim, Chan-Gun Lee, and Kwang-Hyun Baek. (2018). A 0.016mV/mA Cross-regulation 5-Output SIMO DC-DC Buck Converter Using Output-Voltage-Aware Charge Control Scheme. IEEE Transactions on Power Electronics, 33(11), 9619-9629.

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