|Academic Profile |
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Assoc Prof Gwee Bah Hwee
Associate Professor, School of Electrical & Electronic Engineering
Assistant Chair (Outreach), School of Electrical and Electronic Engineering (EEE)
|Dr Bah-Hwee Gwee received his BEng (Hons) degree from University of Aberdeen, UK, in 1990. He received his MEng and PhD degrees from Nanyang Technological University (NTU), Singapore, in 1992 and 1998 respectively.|
He was an Assistant Professor in School of EEE, NTU from 1999 to 2005 and has been an Associate Professor since 2005. He had held several school administrative committee appointments including Chairman of EEE Career Guidance Committee from 2000 - 2005, Chairman of EEE Outreach Committee from 2005 - 2009, Assistant Chair (Students) EEE from 2010 - 2014 and has been the Assistant Chair (Outreach) EEE from 2017 - now.
Dr Gwee was the Principal Investigators (PIs) of a number of research projects including the ASEAN-European Union University Network Programme, Ministry of Education (MoE) Tier-1 and Tier-2, Defence Science Organisation, Temasek Laboratories, A-STAR PSF, Cybersecurity Agency, National Research Foundation projects. He was also the co-PIs of DARPA (USA), NTU-Panasonic, NTU-Lingköping and GAP Fund research projects. His total research grant is amounting to more than US$10m. He has 3 granted and 4 more in filing US patents in circuit design. His research interests include physical hardware security, hardware assurance, asynchronous circuit, digital filter and Class-D amplifier designs. Dr Gwee was awarded Defence Technology Prize Team (R&D) category in 2016, TL@NTU Scientific Award, 2016, TL@NTU Best Publication Award in 2012 and the NTU EEE Teaching Excellence Award – Year 3 in 2013.
Dr Gwee was the Chairman of IEEE Singapore Circuits and Systems Chapter in 2005, 2006, 2013 and 2016. He has been the members of IEEE Circuits and Systems Society (CASS) DSP, VLSI and Bio-CAS Technical Committees (TC) since 2004. He was the Chairman of IEEE CASS DSP TC from 2018 - 2020. He has served in the Organizing Committees for IEEE BioCAS-2004, IEEE APCCAS-2006, Technical Program Chair for ISIC-2007, ISIC-2011, ISIC-2016 and served in the steering committee for IEEE APCCAS 2006 - 2008. He was the General Co-Chair of IEEE DSP 2018 and IEEE SOCC 2019. He was the Associate Editor for journal of Circuits, Systems and Signal Processing from 2007 - 2012, IEEE Transactions on Circuits and Systems I – Regular Papers from 2012-2013 and IEEE Transactions on Circuits and Systems II – Express Brief from 2010 - 2011, from 2018 – 2019 and from 2020 – 2021. He was an IEEE Distinguished Lecturer for CAS Society from 2009 – 2010 and from 2017 - 2018. He was the keynote speaker of IEEE PAINE 2020, IEEE MCSoC 2020, IEEE APCCAS 2020 and ICGCET 2020.
| Asynchronous Circuits|
Physical Hardware Attack
- ASIC FA Phase 2
- Project Hardware Assurance
- Research Programme in Assuring Hardware Security by Design in Systems on Chip (SOCure)
- Sub-Project 2 - Feasibility Study: A Hierarchy Extractor
- Thrust 1 - Low Power Non-imprinting Memory Design with High-Speed Erase
- R. Zhou, K.S. Chong, B.H. Gwee and J.S. Chang. (2014). A Low Overhead Quasi-Delay-Insensitive (QDI) Asynchronous Data Path Synthesis Based on Microcell-Interleaving Genetic Algorithm (MIGA). IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems, v33(n7), pp989-1002.
- T. Lin, K.S. Chong, J.S. Chang and B.H. Gwee. (2013). An Ultra-Low Power Asynchronous-Logic In-Situ Self-Adaptive VDD System for Wireless Sensor Networks. IEEE Journal of Solid-State Circuits, 48(2), 573-586.
- K.S. Chong, K.L. Chang, B.H. Gwee and J.S. Chang. (2012). Synchronous-logic and Globally-Asynchronous-Locally-Synchronous (GALS) Acoustic Digital Signal Processors. IEEE Journal of Solid-State Circuits, 47(3), 769-780.
- C.F. Law, B.H. Gwee and J.S. Chang. (2011). Modeling and Synthesis of Asynchronous Pipelines. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 19(4), 682-695.
- B.H. Gwee, J.S. Chang, Y. Shi, C.C. Chua and K.S. Chong. (2009). A Low-Voltage Micropower Asynchronous Multiplier with Shift-Add Multiplication Approach. IEEE Transactions on Circuits and Systems I-Regular Papers, 56(7), 1349-1359.