|Prof Lim Yong Ching|
Division of Information Engineering
School of Electrical & Electronic Engineering
College of Engineering
Phone: (+65)6790 4510
- DIC PhD Imperial College, University of London 1980
- ACGI BSc(ElecEng)(Hons) Imperial College, University of London 1977
|Prof. Lim Yong Ching received the A.C.G.I. and B.Sc. degrees in 1977 and the D.I.C. and Ph.D. degrees in 1980, all in electrical engineering, from Imperial College, U.K.
Since 2003, he has been with the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, where he is currently a professor. From 1980 to 1982, he was a National Research Council Research Associate in the Naval Postgraduate School, Monterey, California. From 1982 to 2003, he was with the Department of Electrical Engineering, National University of Singapore. His research interests include digital signal processing and VLSI circuits and systems design.
Dr. Lim was a recipient of the 1996 IEEE Circuits and Systems Society’s Guillemin-Cauer Award, the 1990 IREE (Australia) Norman Hayes Memorial Award, 1977 IEE (UK) Prize and the 1974-77 Siemens Memorial (Imperial College) Award. He served as a lecturer for the IEEE Circuits and Systems Society under the distinguished lecturer program from 2001 to 2002 and as an associate editor for the IEEE Transactions on Circuits and Systems from 1991 to 1993 and from 1999 to 2001. He has also served as an associate editor for Circuits, Systems and Signal Processing from 1993 to 2000. He served as the Chairman of the DSP Technical Committee of the IEEE Circuits and Systems Society from 1998 to 2000. He served in the Technical Program Committee’s DSP Track as the Chairman in IEEE ISCAS’97 and IEEE ISCAS’00 and as a Co-chairman in IEEE ISCAS’99. He is the General Chairman for IEEE APCCAS 2006 and a General Co-Chair for IEEE ISCAS 2009.
Dr. Lim is a Fellow of the IEEE.
|Digital Filter Design.
Digital Signal Processing.
Implementation of Signal Processing Algorithms on VLSI
|Research Grant |
- Defence Research and Technology Office (DRTech) (2004-)
- Defence Science Organisation National Laboratories (2006-2018) [by MINDEF - DSO National Laboratories, Nanyang Technological University]
- MINDEF-NTU Joint Applied R&D Co-operation Programme (JPP) (2010-2013)
- Temasek Lab@NTU Seed Project (2005-2018) [by Temasek Lab @ NTU]
|Current Projects |
- High Selectivity Acoustic Array
- Microsystems - Signal Processing System on Chip (DRTech)
- Project Signal Processing on a Chip
- Signal Processing on VSLI
- Very High Speed Data Converter
- Y. C. Lim, Y.J. Yu, and T. Saramaki. (2005). Optimum Masking Levels and Coefficient Sparseness for Hilbert Transformers and Half-Band Filters Designed Using the Frequency-Response Masking Technique. IEEE Transactions on Circuits and Systems I-Regular Papers, CAS-I-52(11), 2444-2453.