Academic Profile

Academic Profile

Assoc Prof Tan Chuan Seng

Associate Dean (Academic), College of Engineering

School of Electrical & Electronic Engineering
College of Engineering

Phone: (+65)65138285/67905636
Office: S2-B2c-85

  • PhD Massachusetts Institute of Technology 2006
  • MEng National University of Singapore 2001
  • BEng (Electrical) (Hons) University of Malaya 1999
Chuan Seng Tan received his B.Eng. degree in electrical engineering from University of Malaya, Malaysia, in 1999. Subsequently, he completed his M.Eng. degree in advanced materials from the National University of Singapore under the Singapore-MIT Alliance (SMA) program in 2001. He then joined the Institute of Microelectronics, Singapore, as a research engineer where he worked on process integration of strained-Si/relaxed-SiGe heterostructure devices. In the fall of 2001, he began his doctoral work at the Massachusetts Institute of Technology, Cambridge, USA, and was awarded a Ph.D. degree in electrical engineering in 2006. He was the recipient of the Applied Materials Graduate Fellowship for 2003-2005. In 2003, he spent his summer interning at Intel Corporation, Oregon. He joined NTU in 2006 as a Lee Kuan Yew Postdoctoral Fellow and since July 2008, he was a holder of the inaugural Nanyang Assistant Professorship. In February 2014, he was promoted to the rank of Associate Professor (with tenure). His research interests are semiconductor process technology and device physics. Currently he is working on process technology of three-dimensional integrated circuits (3-D ICs), as well as engineered substrate (Si/Ge/Sn) for photonics. He has numerous publications (journal and conference) and IP on 3-D technology and engineered substrates. He co-edited/co-authored four books on 3D packaging technology. He provides his service as committee member for International Conference on Wafer Bonding, IEEE-3DIC, IEEE-EPTC, IEEE-ECTC, ECS-Wafer Bonding, and ISTDM. He is an associate editor for Elsevier Microelectronics Journal (MEJ). He is a member of IEEE.

Check out a recent demonstration of a 3D MEMS-CMOS chip (for motion sensing) designed, fabricated and packaged in his group:

Check out a project by his students on bicycle phone charger:
Research Interests
3D packaging and integration
Group-IV hetero-epitaxy (Si, Ge, Sn), engineered substrate and devices
Group-IV photonics
III-V/Ge/Si integration

If you are interested in PhD study or post-doc positions (3D packaging for quantum computing, group-IV Ge photonics communication and sensing) in 2017, please contact
Current Projects
  • Carbon Hetero-Structures for Advanced Thermal Interface in 3D Interconnects
  • Compact and Low Cost Molecular Sensing Platform with Germanium Photonics
  • Development of Passively Mode Locked Ceramic Thin-Disk Lasers With High Average Power And Sub-100fs Pulse Width
  • Emerging Interconnect Reliability
  • Germanium-Based Materials for Silicon-Compatible Near-IR and Mid-IR Light Source
  • Health Monitoring and Failure Prognosis of Power Electronics Systems
  • Heterogeneous Integration III
  • Integration of III-V Heterojunction Bipolar Transistors With Si CMOS
  • Metallic Nanoparticles Enabled Low Temperature Processes for Interconnections in Flexible Electronics and 3D Electronics Packaging
  • Novel Tunable Wavelength Selective Structures and Advanced Materials for Mid and Far IR Spectroscopy
  • SIMTech-NTU Collaborative Joint Lab (Reliability)
  • Sub Project 3 - CMOS and MEMS Integration via TSV-less Stacking for Smart Micro-Sensor Application
  • Sub-project 1 - CMOS-MEMS Integration
  • Three Dimensionally Stacked MEMS Realized with Low temperature Cu-Cu Diffusion Bonding
  • Through Substrate Via with Embedded Capacitor for 3D Packaging
  • Ultimate Miniaturisation of Molecular Sensor (Food Analyser) using Silicon Photonics
Selected Publications
  • L. Zhang, L. Peng, H. Y. Li, G. Q. Lo, D. L. Kwong, and C. S. Tan. (2012). Operating TSV in Stable Accumulation Capacitance Region by Utilizing Al2O3-Induced Negative Fixed Charge. IEEE Electron Device Letters, , 10.1109/LED.2012.2190968.
  • Y. H. Tan, G. Y. Chong, and C. S. Tan. (2012). Direct bonding of Ge-Ge using epitaxially grown Ge-on-Si wafers. ECS Journal of Solid State Science and Technology, , DOI: 10.1149/2.017201jss.
  • J. Fan, L. Peng, K. H. Li, and C. S. Tan. (2012). Wafer-Level Hermetic Packaging of 3D Microsystems with Low Temperature Cu-to-Cu Thermo-compression Bonding and Its Reliability. Journal of Micromechanics and Microengineering, , doi:10.1088/0960-1317/22/10/105004.
  • Zhang, R. I Made, H.Y. Li, S. Gao, G. Q. Lo, D. L. Kwong, and C. S. Tan. (2011). Spatial Variation of TSV Capacitance and Method of Stabilization with Al2O3-Induced Negative Fixed Charge at the Silicon-Liner Interface. IEEE International Electron Devices Meeting (IEDM).
  • L. Peng, H. Y. Li, D. F. Lim, S. Gao, and C. S. Tan. (2011). High Density 3D Interconnect of Cu-Cu Contacts with Enhanced Contact Resistance by Self-Assembled Monolayer (SAM) Passivation. IEEE Transactions on Electron Devices, , 10.1109/TED.2011.2156415.

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