|Academic Profile |
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Asst Prof Anupam Chattopadhyay
School of Computer Science and Engineering
College of Engineering
Phone: (+65)6790 6092
- Dr.-Ing. RWTH Aachen University 2008
- MSc. ALaRI, USI 2002
- BE Jadavpur University 2000
|Anupam Chattopadhyay received his B.E. degree from Jadavpur University, India, MSc. from ALaRI, Switzerland and PhD from RWTH Aachen in 2000, 2002 and 2008 respectively. From 2008 to 2009, he worked as a Member of Consulting Staff in CoWare R&D, Noida, India. From 2010 to 2014, he led the MPSoC Architectures Research Group in RWTH Aachen, Germany as a Junior Professor. Since September, 2014, he is appointed as an assistant Professor in SCSE, NTU and also holds an honorary adjunct appointment at SPMS, NTU. In the past, he was visiting Professor at EPFL, Switzerland and Indian Statistical Institute, Kolkata.|
During his doctoral studies, he worked on automatic RTL generation from the architecture description language LISA, which led to a spin-off, and subsequently was acquired by a leading EDA vendor. He developed novel high-level optimisations, verification techniques, and proposed a language-based modelling, exploration and design framework for partially re-configurable processors - many of which resulted in successful technology transfers to the EDA and Semiconductor IP industry.
Anupam currently heads a team of 20+ researchers, overseeing projects in the area of computer architectures, security, design automation and emerging technologies. His research advances has been reported in more than 100 conference/journal papers (ACM/IEEE/Springer), multiple research monographs and edited books (CRC, Springer) and open-access forums. Together with his doctoral students, Anupam proposed novel research directions like, domain-specific high-level synthesis for cryptography, high-level reliability estimation flows for embedded processors, generalisation of classic linear algebra kernels and multi-layered coarse-grained reconfigurable architecture. Anupam’s research in the area of emerging technologies has been covered by major news outlets across the world, including Asian Scientist, Straits Times and The Economist.
Anupam regularly serves in the TPCs of top conferences, reviews journal/ conference articles and presented multiple invited seminars/tutorials in prestigious venues. He is a series editor of Springer book series on Computer Architecture and Design Methodologies. He is a member of ACM and a senior member of IEEE.
Anupam received Borcher's plaque from RWTH Aachen, Germany for outstanding doctoral dissertation in 2008 and the nomination for best IP award in DATE 2016.
- Academic Research Fund Tier 1 (2015-)
- Academic Research Fund Tier 2 (2016-2019) [by Ministry of Education (MOE)]
- Defence Science Organisation National Laboratories (2017-) [by DSO National Laboratories]
- MOE Tertiary Education Research Fund (2017-) [by Ministry of Education (MOE)]
- NRF - Cyber Security (2017-) [by Nanyang Technological University]
- NRF - Cyber Security (2017-) [by National Research Foundation (NRF)]
- NRF TUM CREATE (2016-) [by National Research Foundation (NRF)]
- NRF TUM CREATE (2016-2021) [by National Research Foundation (NRF)]
- NTU Internal Funding - Start Up Grant - School of Computer Engineering (2014-)
- Bio-inspired agile cyber-security assurance framework (BICSAF)
- Block chain-Enabled Smart Health Insurance Contract
- Cloud-enhanced Learning for Hardware-Oriented Labs in Computing
- Cybersecurity Protocol and Mechanism for e-Logistics of Dangerous Goods Tracking Using Block Chain
- Logic Synthesis Flow for Digital Design Technologies Beyond CMOS
- POSYN: Logic, Circuit and Architectural Synthesis for Post-CMOS Technologies; HAVIS: Development of customizable, accurate, efficient and scalable Hardware-Accelerated Virtual Screening Platform
- Productive Failure via Educational Games for Tertiary Education
- Sensing and Management for Agile Transportation (SMAT)
- Sparse-represented Non-volatile In-memory Accelerator for Big-Data Analytics
- Sub Project C
- To Research & Develop Assessment Tool and System – OpsTrace
- Debjyoti Bhattacharjee, Vikramkumar Pudi and Anupam Chattopadhyay. (2017). The 18th International Symposium on Quality Electronic Design (ISQED 2017): SHA-3 Implementation Using ReRAM based In-Memory Computing Architecture. The 18th International Symposium on Quality Electronic Design (ISQED 2017)USA: IEEE.
- Vikramkumar Pudi, Anupam Chattopadhyay and Thambipillai Srikanthan. (2016). IEEE: Modified projected Landweber method for Compressive-Sensing reconstruction of images with non-orthogonal matrices. 2016 International Symposium on Integrated Circuits (ISIC), Singapore, (pp. 1-4)Singapore: IEEE.
- Wonjoo Kim, Anupam Chattopadhyay, Anne Siemon, Eike Linn, Rainer Waser & Vikas Rana. (2016). Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic. Scientific Reports, .
- Anupam Chattopadhyay, Vikramkumar Pudi, Anubhab Baksi, Thambipillai Srikanthan. (2016). FPGA Based Cyber Security Protocol for Automated Traffic Monitoring Systems: Proposal and Implementation. Proceedings of 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2016).
- Mathias Soeken, Anupam Chattopadhyay. (2016). Unlocking Efficiency and Scalability of Reversible Logic Synthesis using Conventional Logic Synthesis. ACM/IEE DAC.