|Anupam Chattopadhyay received his B.E. degree from Jadavpur University, India, MSc. from ALaRI, Switzerland and PhD from RWTH Aachen in 2000, 2002 and 2008 respectively. From 2008 to 2009, he worked as a Member of Consulting Staff in CoWare R&D, Noida, India. From 2010 to 2014, he led the MPSoC Architectures Research Group in RWTH Aachen, Germany as a Junior Professor. Since September, 2014, he is appointed as an assistant Professor in SCSE, NTU and also holds an honorary adjunct appointment at SPMS, NTU. In the past, he was visiting Professor at EPFL, Switzerland and Indian Statistical Institute, Kolkata.|
During his doctoral studies, he worked on automatic RTL generation from the architecture description language LISA, which led to a spin-off, and subsequently was acquired by a leading EDA vendor. He developed novel high-level optimisations, verification techniques, and proposed a language-based modelling, exploration and design framework for partially re-configurable processors - many of which resulted in successful technology transfers to the EDA and Semiconductor IP industry.
Anupam currently heads a team of 20+ researchers, overseeing projects in the area of computer architectures, security, design automation and emerging technologies. His research advances has been reported in more than 100 conference/journal papers (ACM/IEEE/Springer), multiple research monographs and edited books (CRC, Springer) and open-access forums. Together with his doctoral students, Anupam proposed novel research directions like, domain-specific high-level synthesis for cryptography, high-level reliability estimation flows for embedded processors, generalisation of classic linear algebra kernels and multi-layered coarse-grained reconfigurable architecture. Anupam’s research in the area of emerging technologies has been covered by major news outlets across the world, including Asian Scientist, Straits Times and The Economist.
Anupam regularly serves in the TPCs of top conferences, reviews journal/ conference articles and presented multiple invited seminars/tutorials in prestigious venues. He is a series editor of Springer book series on Computer Architecture and Design Methodologies. He is a member of ACM and a senior member of IEEE.
Anupam received Borcher's plaque from RWTH Aachen, Germany for outstanding doctoral dissertation in 2008, nomination for the best IP award in the ACM/IEEE DATE Conference 2016 and nomination for the best paper award in the International Conference on VLSI Design 2018.
- Tarun Vatwani, Arko Dutt, Debjyoti Bhattacharjee, Anupam Chattopadhyay. (2018). PROCEEDINGS OF The 31 th International Conference on VLSI DESIGN Held Concurrently with The 17 th International Conference on EMBEDDED SYSTEMS: Floating Point Multiplication Mapping on ReRAM Based In-memory Computing Architecture. VLSID & ES 2018 (pp. 439-444)India: IEEE.
- Ming Ming Wong, Jawad Haj-Yahya, Suman Sau and Anupam Chattopadhyay. (2018). A New High Throughput and Area Efficient SHA-3 Implementation. ISCAS2018 – IEEE International Symposium on Circuits & Systems.
- Debjyoti Bhattacharjee, Wonjoo Kim, Anupam Chattopadhyay, Rainer Waser and Vikas Rana. (2018). Multi-valued and Fuzzy Logic Realization using TaOx Memristive Devices. Nature Scientific Reports, 8(8).
- Andreas Burg, Anupam Chattopadhyay and Kwok-Yan Lam. (2018). Wireless Communication and Security Issues for Cyber–Physical Systems and the Internet-of-Things. Proceedings of the IEEE, 106(1), 38-60.
- Mustafa Khairallah, Anupam Chattopadhyay and Thomas Peyrin. (2017). Looting the LUTs: FPGA Optimization of AES and AES-like Ciphers for Authenticated Encryption. Indocrypt (pp. 282-301)India.